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Modeling MOSFET Threshold Voltage in TSMC 0.18um CMOS for Integrated Circuits Design | ||
Contributions of Science and Technology for Engineering | ||
دوره 1، شماره 1، خرداد 2024، صفحه 1-11 اصل مقاله (719.32 K) | ||
نوع مقاله: Original Article | ||
شناسه دیجیتال (DOI): 10.22080/cste.2024.5008 | ||
نویسندگان | ||
Amir Ebrahimi1؛ Habib Adarang* 2 | ||
1School of Engineering, RMIT University, Melbourne, Australia | ||
2Department of Electrical Engineering, Faculty of Engineering and Technology, University of Mazandaran, Babolsar. Iran | ||
تاریخ دریافت: 15 دی 1402، تاریخ بازنگری: 16 بهمن 1402، تاریخ پذیرش: 21 بهمن 1402 | ||
چکیده | ||
The threshold voltage of a MOSFET, represented by VTH, is a major parameter in the circuit design, and the lack of an accurate equation for the threshold voltage of transistors is one of the main challenges for integrated circuit designers. Based on the data obtained from the simulation, the present paper aims to investigate the effect of bias voltages (VGS, VDS, and VBS), transistor's dimensions (W and L), and temperature (T) on the value of threshold voltage, followed by the use of Levenberg-Marquardt method to propose a new equation for obtaining the threshold voltage value regarding different parameters. The obtained equation can be helpful for the design and manual calculations of the integrated circuits. Furthermore, various simulations were performed to evaluate the validity and accuracy of the obtained equation, indicating excellent consistency between the proposed equation and simulation results | ||
کلیدواژهها | ||
Threshold voltage (VTH)؛ Levenberg-Marquardt؛ Short Channel Effect؛ Drain-Induced Barrier Lowering (DIBL) | ||
آمار تعداد مشاهده مقاله: 87 تعداد دریافت فایل اصل مقاله: 115 |